1. Field of the Invention
The present invention relates generally to methods of making wafers for analytically inspecting the effectiveness of wafer backside cleaning, and methods for using such wafers to test and analyze the effectiveness of the cleaning operation(s).
2. Description of the Related Art
In the fabrication of semiconductor devices, there is a need to perform wet cleaning of substrates at various stages of the fabrication process. Typically, integrated circuit devices are in the form of multi-level structures. At the substrate level, transistor devices having diffusion regions are formed over and into silicon substrates. In subsequent levels, interconnect metallization lines are patterned and electrically connected to the transistor devices to define the desired functional device. As is well known, patterned conductive layers are insulated from other conductive layers by dielectric materials, such as silicon dioxide. At each metallization level there is a need to planarize metal or associated dielectric material. Without planarization, fabrication of additional metallization layers becomes substantially more difficult due to the higher variations in the surface topography. In some applications, metallization line patterns are formed in the dielectric material, and then metal CMP operations are performed to remove excess metallization.
Following each CMP operation, a wet clean of the substrate is performed. The wet clean is designed to wash away any by-products of the fabrication process, remove contaminants, and to achieve and maintain the necessary degree of cleanliness essential to proceed to a subsequent fabrication operation. As transistor device structures become smaller and more complex, the precision required to achieve and maintain structure definition demands exacting standards of cleanliness be maintained in all process operations. If a wet clean is incomplete or ineffective, or if a post-wet clean drying is incomplete or ineffective, then unacceptable residue or contaminants are introduced into the processing environment.
Rinsing and drying techniques, methods, and apparatus are plentiful and known in the art, and incorporate such operations as rinsing and scrubbing, immersion, and the application of thermal, mechanical, chemical, electrical, or sonic energy and the like to remove or displace water and dry the substrate. While some scrub and rinse operations may employ acids or bases for vigorous interaction with fabrication by-products, deionized water (DIW) is commonly used to perform a final rinse before the desired drying technique is performed.
Once a substrate has been processed through a wet clean and dried, the wafer is allowed to stand and if any water remained after the drying process, it would evaporate. Water allowed to evaporate introduces contaminants as evidenced by the water marks or stains caused by residual solids from evaporated water. It is therefore desirable to evaluate drying techniques used, recognizing that the techniques are more or less effective depending on such factors as the type of substrate being processed, fabrication materials, processing environment, and the like. Common methods of evaluating the effectiveness of selected drying techniques include visual inspection, electrical analysis and mass analysis.
Visual inspection of substrates is generally effective for blanket film substrates as the surface of the substrate is smooth and easily inspected for remaining water. Patterned substrates, however, are difficult to inspect visually as water can be trapped in patterned features and not visible. The backside of a wafer will also have a level of roughness. This roughness can, in some cases, define features up to 5000 angstroms RMS (root mean squared) or more. For comparison, the roughness of a polished wafer or surface may only yield feature sizes up to about 1-20 angstroms RMS (root mean squared). Visual inspection is therefore ineffective for drying technique evaluation.
Electrical analysis can also be effective for blanket film substrates, but as more and more structures are fabricated and regions of the substrate subjected to doping, and masking, electrical analysis can be detrimental to transistor structure fabrication as electrical charges introduced can damage or destroy precisely charged regions of the structures being fabricated.
Mass analysis is a comparative evaluation of wet and dry substrates. Typically, mass analysis includes an initial drying operation followed by weighing the substrate and then, after some time, re-weighing the substrate to determine if a change in mass has or has not occurred. Although mass analysis is not subject to the same limitations presented by visual inspection and electrical analysis in the evaluation of patterned substrates, mass analysis is cumbersome, time consuming, and far less accurate than other methods.
What is needed is a method to evaluate advanced cleaning and drying techniques used in the fabrication of semiconductor substrates. The method should include a way to accurately and precisely analyze a substrate that has been dried, and to use the results of the analysis to select, modify, or adjust the cleaning and/or drying technique to ensure that the backside of wafers used to make active integrated circuit chips do not introduce contaminants into the processing environment.
Broadly speaking, an invention for is provided for analytically analyzing the effectiveness of semiconductor wafer cleaning operations. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, a method for using a monitor substrate to determine effectiveness of a cleaning operation is disclosed. The method includes selecting a substrate from a lot of substrates and inspecting a surface of the substrate to determine a roughness profile of the substrate. The monitor substrate is then processed through a cleaning operation, and the monitor substrate is patterned with die regions throughout. Each of the die regions has a plurality of areas defining distinct roughness simulations. The method the proceeds to inspecting the monitor substrate at one die region and at one of the plurality of areas in the one die region that most closely resembles the roughness profile of the substrate. The inspecting of the monitor substrate is configured to yield data regarding cleaning performance of the cleaning operation.
In another embodiment, a process for determining effectiveness of a substrate cleaning operation is disclosed. The method includes selecting a substrate from a lot of substrates and inspecting a surface of the substrate selected from the lot of substrates to determine a roughness profile of the substrate. The method then includes processing a monitor substrate through a cleaning operation. The monitor substrate is patterned with die regions throughout, and each of the die regions has a plurality of areas defining distinct roughness simulations. Each die region further having pitches ranging between about 0.1 micron and about 1 micron and pattern densities ranging between about 1 and 2. The monitor substrate is inspected after completing the processing. The inspecting occurring at one die region and at one of the plurality of areas in the one die region that most closely resembles the roughness profile of the substrate. The inspecting of the monitor substrate yielding data quantifying cleaning performance of the cleaning operation.
In yet another embodiment, a method for making a monitor substrate for determining cleaning performance of a cleaning process is disclosed. The method includes designing a pattern that includes a matrix of different roughness simulations, the pattern defining a die region. Each of the different roughness simulations having a pitch ranging between about 0.1 micron and about 1 micron and a pattern density ranging between about 1 and 2. The method further includes replicating the die region over a surface of the monitor substrate. The replicating of the die region over the surface is designed to cover substantially all of the surface of the monitor wafer. The monitor wafer is capable of being processed through cleaning operations and inspected at particular die regions in particular roughness simulations to ascertain performance of the cleaning operations.
Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.